Employed VeriLite simulation to improve SOC design and verification

Wen-Tsai Sung, Shih-Ching Ou, Yu-Feng Liu, Chia-Hao Chen. Employed VeriLite simulation to improve SOC design and verification. Comp. Applic. in Engineering Education, 20(2):374-382, 2012. [doi]

@article{SungOLC12,
  title = {Employed VeriLite simulation to improve SOC design and verification},
  author = {Wen-Tsai Sung and Shih-Ching Ou and Yu-Feng Liu and Chia-Hao Chen},
  year = {2012},
  doi = {10.1002/cae.20404},
  url = {https://doi.org/10.1002/cae.20404},
  researchr = {https://researchr.org/publication/SungOLC12},
  cites = {0},
  citedby = {0},
  journal = {Comp. Applic. in Engineering Education},
  volume = {20},
  number = {2},
  pages = {374-382},
}