FPGA and ASIC square root designs for high performance and power efficiency

Shashank Suresh, Spiridon F. Beldianu, Sotirios G. Ziavras. FPGA and ASIC square root designs for high performance and power efficiency. In 24th International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2013, Washington, DC, USA, June 5-7, 2013. pages 269-272, IEEE, 2013. [doi]

Authors

Shashank Suresh

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Spiridon F. Beldianu

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Sotirios G. Ziavras

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