Shashank Suresh, Spiridon F. Beldianu, Sotirios G. Ziavras. FPGA and ASIC square root designs for high performance and power efficiency. In 24th International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2013, Washington, DC, USA, June 5-7, 2013. pages 269-272, IEEE, 2013. [doi]
@inproceedings{SureshBZ13,
title = {FPGA and ASIC square root designs for high performance and power efficiency},
author = {Shashank Suresh and Spiridon F. Beldianu and Sotirios G. Ziavras},
year = {2013},
doi = {10.1109/ASAP.2013.6567588},
url = {http://doi.ieeecomputersociety.org/10.1109/ASAP.2013.6567588},
researchr = {https://researchr.org/publication/SureshBZ13},
cites = {0},
citedby = {0},
pages = {269-272},
booktitle = {24th International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2013, Washington, DC, USA, June 5-7, 2013},
publisher = {IEEE},
isbn = {978-1-4799-0494-5},
}