B. Suresh, Biswadeep Chaterjee, R. Harinath. Synthesizable RAM-Alternative to Low Configuration Compiler Memory for Die Area Reduction. In 13th International Conference on VLSI Design (VLSI Design 2000), 4-7 January 2000, Calcutta, India. pages 512-517, IEEE Computer Society, 2000. [doi]
Abstract is missing.