Vishal Suthar, Shantanu Dutt. Efficient on-line interconnect testing in FPGAs with provable detectability for multiple faults. In Georges G. E. Gielen, editor, Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2006, Munich, Germany, March 6-10, 2006. pages 1165-1170, European Design and Automation Association, Leuven, Belgium, 2006. [doi]
Abstract is missing.