Area-efficient LUT circuit design based on asymmetry of MTJ's current switching for a nonvolatile FPGA

Daisuke Suzuki, Masanori Natsui, Takahiro Hanyu. Area-efficient LUT circuit design based on asymmetry of MTJ's current switching for a nonvolatile FPGA. In 55th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2012, Boise, ID, USA, August 5-8, 2012. pages 334-337, IEEE, 2012. [doi]

@inproceedings{SuzukiNH12,
  title = {Area-efficient LUT circuit design based on asymmetry of MTJ's current switching for a nonvolatile FPGA},
  author = {Daisuke Suzuki and Masanori Natsui and Takahiro Hanyu},
  year = {2012},
  doi = {10.1109/MWSCAS.2012.6292025},
  url = {https://doi.org/10.1109/MWSCAS.2012.6292025},
  researchr = {https://researchr.org/publication/SuzukiNH12},
  cites = {0},
  citedby = {0},
  pages = {334-337},
  booktitle = {55th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2012, Boise, ID, USA, August 5-8, 2012},
  publisher = {IEEE},
  isbn = {978-1-4673-2526-4},
}