Gate sizing: finFETs vs 32nm bulk MOSFETs

Brian Swahn, Soha Hassoun. Gate sizing: finFETs vs 32nm bulk MOSFETs. In Ellen Sentovich, editor, Proceedings of the 43rd Design Automation Conference, DAC 2006, San Francisco, CA, USA, July 24-28, 2006. pages 528-531, ACM, 2006. [doi]

@inproceedings{SwahnH06,
  title = {Gate sizing: finFETs vs 32nm bulk MOSFETs},
  author = {Brian Swahn and Soha Hassoun},
  year = {2006},
  doi = {10.1145/1146909.1147047},
  url = {http://doi.acm.org/10.1145/1146909.1147047},
  researchr = {https://researchr.org/publication/SwahnH06},
  cites = {0},
  citedby = {0},
  pages = {528-531},
  booktitle = {Proceedings of the 43rd Design Automation Conference, DAC 2006, San Francisco, CA, USA, July 24-28, 2006},
  editor = {Ellen Sentovich},
  publisher = {ACM},
  isbn = {1-59593-381-6},
}