Siddharth T, Sharvani Gadgil, Chetan Vudadha. Design of CNTFET-based Ternary Logic circuits using Low power Encoder. In IEEE International Symposium on Smart Electronic Systems, iSES 2022, Warangal, India, December 18-22, 2022. pages 142-147, IEEE, 2022. [doi]
@inproceedings{TGV22,
title = {Design of CNTFET-based Ternary Logic circuits using Low power Encoder},
author = {Siddharth T and Sharvani Gadgil and Chetan Vudadha},
year = {2022},
doi = {10.1109/iSES54909.2022.00038},
url = {https://doi.org/10.1109/iSES54909.2022.00038},
researchr = {https://researchr.org/publication/TGV22},
cites = {0},
citedby = {0},
pages = {142-147},
booktitle = {IEEE International Symposium on Smart Electronic Systems, iSES 2022, Warangal, India, December 18-22, 2022},
publisher = {IEEE},
isbn = {979-8-3503-9922-6},
}