Jubee Tada, Keiichi Satoh. An Implementation of a Grid Square Codes Generator on a RISC-V Processor. In Eighth International Symposium on Computing and Networking Workshops, CANDAR 2020 Workshops, Naha, Japan, November 24-27, 2020. pages 294-297, IEEE, 2020. [doi]
@inproceedings{TadaS20-0,
title = {An Implementation of a Grid Square Codes Generator on a RISC-V Processor},
author = {Jubee Tada and Keiichi Satoh},
year = {2020},
doi = {10.1109/CANDARW51189.2020.00064},
url = {https://doi.org/10.1109/CANDARW51189.2020.00064},
researchr = {https://researchr.org/publication/TadaS20-0},
cites = {0},
citedby = {0},
pages = {294-297},
booktitle = {Eighth International Symposium on Computing and Networking Workshops, CANDAR 2020 Workshops, Naha, Japan, November 24-27, 2020},
publisher = {IEEE},
isbn = {978-1-7281-9919-1},
}