An Instruction Throughput Model of Superscalar Processors

Tarek M. Taha, D. Scott Wills. An Instruction Throughput Model of Superscalar Processors. IEEE Transactions on Computers, 57(3):389-403, 2008. [doi]

@article{TahaW08,
  title = {An Instruction Throughput Model of Superscalar Processors},
  author = {Tarek M. Taha and D. Scott Wills},
  year = {2008},
  doi = {10.1109/TC.2007.70817},
  url = {http://doi.ieeecomputersociety.org/10.1109/TC.2007.70817},
  tags = {modeling, process modeling},
  researchr = {https://researchr.org/publication/TahaW08},
  cites = {0},
  citedby = {0},
  journal = {IEEE Transactions on Computers},
  volume = {57},
  number = {3},
  pages = {389-403},
}