Logic for Static Hazard Detection of Multiple-Valued Logic Circuits with Tsum, Min, and Literals

Noboru Takagi, Kyoichi Nakashima. Logic for Static Hazard Detection of Multiple-Valued Logic Circuits with Tsum, Min, and Literals. In 32nd IEEE International Symposium on Multiple-Valued Logic (ISMVL 2002), May 15-18, 2002, Boston, Massachusetts, USA. pages 46, IEEE Computer Society, 2002. [doi]

@inproceedings{TakagiN02,
  title = {Logic for Static Hazard Detection of Multiple-Valued Logic Circuits with Tsum, Min, and Literals},
  author = {Noboru Takagi and Kyoichi Nakashima},
  year = {2002},
  url = {http://computer.org/proceedings/ismvl/1462/14620046abs.htm},
  tags = {logic},
  researchr = {https://researchr.org/publication/TakagiN02},
  cites = {0},
  citedby = {0},
  pages = {46},
  booktitle = {32nd IEEE International Symposium on Multiple-Valued Logic (ISMVL 2002), May 15-18, 2002, Boston, Massachusetts, USA},
  publisher = {IEEE Computer Society},
  isbn = {0-7695-1462-6},
}