4.5 A 16nm FinFET heterogeneous nona-core SoC complying with ISO26262 ASIL-B: Achieving 10-7 random hardware failures per hour reliability

Chikafumi Takahashi, Shinichi Shibahara, Kazuki Fukuoka, Jun Matsushima, Yuko Kitaji, Yasuhisa Shimazaki, Hirotaka Hara, Takahiro Irita. 4.5 A 16nm FinFET heterogeneous nona-core SoC complying with ISO26262 ASIL-B: Achieving 10-7 random hardware failures per hour reliability. In 2016 IEEE International Solid-State Circuits Conference, ISSCC 2016, San Francisco, CA, USA, January 31 - February 4, 2016. pages 80-81, IEEE, 2016. [doi]

@inproceedings{TakahashiSFMKSH16,
  title = {4.5 A 16nm FinFET heterogeneous nona-core SoC complying with ISO26262 ASIL-B: Achieving 10-7 random hardware failures per hour reliability},
  author = {Chikafumi Takahashi and Shinichi Shibahara and Kazuki Fukuoka and Jun Matsushima and Yuko Kitaji and Yasuhisa Shimazaki and Hirotaka Hara and Takahiro Irita},
  year = {2016},
  doi = {10.1109/ISSCC.2016.7417916},
  url = {http://dx.doi.org/10.1109/ISSCC.2016.7417916},
  researchr = {https://researchr.org/publication/TakahashiSFMKSH16},
  cites = {0},
  citedby = {0},
  pages = {80-81},
  booktitle = {2016 IEEE International Solid-State Circuits Conference, ISSCC 2016, San Francisco, CA, USA, January 31 - February 4, 2016},
  publisher = {IEEE},
  isbn = {978-1-4673-9467-3},
}