Itsuo Takanami, Tadayoshi Horita. Self-reconstruction of mesh-arrays with 1 1/2 -track switches by digital neural circuits. In 1997 Workshop on Defect and Fault-Tolerance in VLSI Systems (DFT 97), 20-22 October 1997, Paris, France. pages 218-226, IEEE Computer Society, 1997. [doi]
Abstract is missing.