Wafer-scale VLSI realization using programmable architecture

Atsushi Takata, Minoru Watanabe, Nobuya Watanabe. Wafer-scale VLSI realization using programmable architecture. In IEEE International Conference on Consumer Electronics, ICCE 2024, Las Vegas, NV, USA, January 6-8, 2024. pages 1-2, IEEE, 2024. [doi]

@inproceedings{TakataWW24,
  title = {Wafer-scale VLSI realization using programmable architecture},
  author = {Atsushi Takata and Minoru Watanabe and Nobuya Watanabe},
  year = {2024},
  doi = {10.1109/ICCE59016.2024.10444278},
  url = {https://doi.org/10.1109/ICCE59016.2024.10444278},
  researchr = {https://researchr.org/publication/TakataWW24},
  cites = {0},
  citedby = {0},
  pages = {1-2},
  booktitle = {IEEE International Conference on Consumer Electronics, ICCE 2024, Las Vegas, NV, USA, January 6-8, 2024},
  publisher = {IEEE},
  isbn = {979-8-3503-2413-6},
}