A 4× 25-to-28Gb/s 4.9mW/Gb/s -9.7dBm high-sensitivity optical receiver based on 65nm CMOS for board-to-board interconnects

Takashi Takemoto, Hiroki Yamashita, Toru Yazaki, Norio Chujo, Yong Lee, Yasunobu Matsuoka. A 4× 25-to-28Gb/s 4.9mW/Gb/s -9.7dBm high-sensitivity optical receiver based on 65nm CMOS for board-to-board interconnects. In 2013 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, ISSCC 2013, San Francisco, CA, USA, February 17-21, 2013. pages 118-119, IEEE, 2013. [doi]

Abstract

Abstract is missing.