A secure architecture for the design for testability structures

Samta D. Talatule, Pravin Zode, Pradnya Zode. A secure architecture for the design for testability structures. In 19th International Symposium on VLSI Design and Test, VDAT 2015, Ahmedabad, India, June 26-29, 2015. pages 1-6, IEEE, 2015. [doi]

@inproceedings{TalatuleZZ15,
  title = {A secure architecture for the design for testability structures},
  author = {Samta D. Talatule and Pravin Zode and Pradnya Zode},
  year = {2015},
  doi = {10.1109/ISVDAT.2015.7208090},
  url = {http://dx.doi.org/10.1109/ISVDAT.2015.7208090},
  researchr = {https://researchr.org/publication/TalatuleZZ15},
  cites = {0},
  citedby = {0},
  pages = {1-6},
  booktitle = {19th International Symposium on VLSI Design and Test, VDAT 2015, Ahmedabad, India, June 26-29, 2015},
  publisher = {IEEE},
  isbn = {978-1-4799-1743-3},
}