Digital clock and data recovery circuit design: Challenges and tradeoffs

Mrunmay Talegaonkar, Rajesh Inti, Pavan Kumar Hanumolu. Digital clock and data recovery circuit design: Challenges and tradeoffs. In Rakesh Patel, Tom Andre, Aurangzeb Khan, editors, 2011 IEEE Custom Integrated Circuits Conference, CICC 2011, San Jose, CA, USA, Sept. 19-21, 2011. pages 1-8, IEEE, 2011. [doi]

@inproceedings{TalegaonkarIH11,
  title = {Digital clock and data recovery circuit design: Challenges and tradeoffs},
  author = {Mrunmay Talegaonkar and Rajesh Inti and Pavan Kumar Hanumolu},
  year = {2011},
  doi = {10.1109/CICC.2011.6055346},
  url = {http://dx.doi.org/10.1109/CICC.2011.6055346},
  researchr = {https://researchr.org/publication/TalegaonkarIH11},
  cites = {0},
  citedby = {0},
  pages = {1-8},
  booktitle = {2011 IEEE Custom Integrated Circuits Conference, CICC 2011, San Jose, CA, USA, Sept. 19-21, 2011},
  editor = {Rakesh Patel and Tom Andre and Aurangzeb Khan},
  publisher = {IEEE},
  isbn = {978-1-4577-0222-8},
}