Analysis of ESD discharge current distribution and area optimization of VDMOS gate protection structure

Wing-Shan Tam, Oi-Ying Wong, Tsz-Ching Ng, Chi-Wah Kok, Hei Wong. Analysis of ESD discharge current distribution and area optimization of VDMOS gate protection structure. Microelectronics Reliability, 50(5):622-626, 2010. [doi]

@article{TamWNKW10,
  title = {Analysis of ESD discharge current distribution and area optimization of VDMOS gate protection structure},
  author = {Wing-Shan Tam and Oi-Ying Wong and Tsz-Ching Ng and Chi-Wah Kok and Hei Wong},
  year = {2010},
  doi = {10.1016/j.microrel.2010.01.047},
  url = {http://dx.doi.org/10.1016/j.microrel.2010.01.047},
  tags = {optimization, analysis},
  researchr = {https://researchr.org/publication/TamWNKW10},
  cites = {0},
  citedby = {0},
  journal = {Microelectronics Reliability},
  volume = {50},
  number = {5},
  pages = {622-626},
}