Yan Tan, Xiangchen Meng, Zijun Jiang, Yangdi Lyu. AutoVeriFix: Automatically Correcting Errors and Enhancing Functional Correctness in LLM-Generated Verilog Code. In 31st Asia and South Pacific Design Automation Conference, ASP-DAC 2026, Lantau, Hong Kong, January 19-22, 2026. pages 526-532, IEEE, 2026. [doi]
Abstract is missing.