Researchr is a web site for finding, collecting, sharing, and reviewing scientific publications, for researchers by researchers.
Sign up for an account to create a profile with publication list, tag and review your related work, and share bibliographies with your co-authors.
Kyosuke Tanaka, Hayato Yamaki, Shinobu Miwa, Hiroki Honda. Multi-Level Packet Processing Caches. In IEEE Symposium in Low-Power and High-Speed Chips, COOL CHIPS 2019, Yokohama, Japan, April 17-19, 2019. pages 1-3, IEEE, 2019. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: Evaluating architecture-level optimization in packet processing cachesKyosuke Tanaka, Hayato Yamaki, Shinobu Miwa, Hiroki Honda. cn, 181:107550, 2020. [doi] Effective cache replacement policy for packet processing cacheHayato Yamaki. ijcomsys, 33(14), 2020. [doi]
The following publications are possibly variants of this publication: