Kyosuke Tanaka, Hayato Yamaki, Shinobu Miwa, Hiroki Honda. Multi-Level Packet Processing Caches. In IEEE Symposium in Low-Power and High-Speed Chips, COOL CHIPS 2019, Yokohama, Japan, April 17-19, 2019. pages 1-3, IEEE, 2019. [doi]
Abstract is missing.