Wei Tang 0010, Sung-gun Cho, Tim Tri Hoang, Jacob Botimer, Wei Qiang Zhu, Ching-Chi Chang, Cheng-Hsun Lu, Junkang Zhu, Yaoyu Tao, Tianyu Wei, Naomi Kavi Motwani, Mani Yalamanchi, Ramya Yarlagadda, Sirisha Kale, Mark Flannigan, Allen Chan, Thungoc Tran, Sergey Y. Shumarayev, Zhengya Zhang. 2 AIB 2.0 Interface to Provide Versatile Workload Acceleration. In 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), Kyoto, Japan, June 11-16, 2023. pages 1-2, IEEE, 2023. [doi]
@inproceedings{TangCHBZCLZTWMY23,
title = {2 AIB 2.0 Interface to Provide Versatile Workload Acceleration},
author = {Wei Tang 0010 and Sung-gun Cho and Tim Tri Hoang and Jacob Botimer and Wei Qiang Zhu and Ching-Chi Chang and Cheng-Hsun Lu and Junkang Zhu and Yaoyu Tao and Tianyu Wei and Naomi Kavi Motwani and Mani Yalamanchi and Ramya Yarlagadda and Sirisha Kale and Mark Flannigan and Allen Chan and Thungoc Tran and Sergey Y. Shumarayev and Zhengya Zhang},
year = {2023},
doi = {10.23919/VLSITechnologyandCir57934.2023.10185388},
url = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185388},
researchr = {https://researchr.org/publication/TangCHBZCLZTWMY23},
cites = {0},
citedby = {0},
pages = {1-2},
booktitle = {2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), Kyoto, Japan, June 11-16, 2023},
publisher = {IEEE},
isbn = {978-4-86348-806-9},
}