Low-Voltage, Low-Distortion and Rail-to-Rail CMOS Sample and Hold Circuit - researchr publication authors

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Koichi Tanno, Kiminobu Sato, Hisashi Tanaka, Okihiko Ishizuka. Low-Voltage, Low-Distortion and Rail-to-Rail CMOS Sample and Hold Circuit. IEICE Transactions, 88-A(10):2696-2698, 2005. [doi]

This author has not been identified. Look up 'Koichi Tanno' in GoogleThis author has not been identified. Look up 'Kiminobu Sato' in GoogleThis author has not been identified. Look up 'Hisashi Tanaka' in GoogleThis author has not been identified. Look up 'Okihiko Ishizuka' in Google

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