Koichi Tanno, Kiminobu Sato, Hisashi Tanaka, Okihiko Ishizuka. Low-Voltage, Low-Distortion and Rail-to-Rail CMOS Sample and Hold Circuit. IEICE Transactions, 88-A(10):2696-2698, 2005. [doi]
@article{TannoSTI05,
title = {Low-Voltage, Low-Distortion and Rail-to-Rail CMOS Sample and Hold Circuit},
author = {Koichi Tanno and Kiminobu Sato and Hisashi Tanaka and Okihiko Ishizuka},
year = {2005},
doi = {10.1093/ietfec/e88-a.10.2696},
url = {http://dx.doi.org/10.1093/ietfec/e88-a.10.2696},
researchr = {https://researchr.org/publication/TannoSTI05},
cites = {0},
citedby = {0},
journal = {IEICE Transactions},
volume = {88-A},
number = {10},
pages = {2696-2698},
}