An FPGA-based hardware accelerator for simulating spatiotemporal neurons - researchr publication authors

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Ghaith Tarawneh, Jenny Read. An FPGA-based hardware accelerator for simulating spatiotemporal neurons. In 21st IEEE International Conference on Electronics, Circuits and Systems, ICECS 2014, Marseille, France, December 7-10, 2014. pages 618-621, IEEE, 2014. [doi]

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