A 40-nm Sub-Threshold 5T SRAM Bit Cell With Improved Read and Write Stability

Adam Teman, Anatoli Mordakhay, Janna Mezhibovsky, Alexander Fish. A 40-nm Sub-Threshold 5T SRAM Bit Cell With Improved Read and Write Stability. IEEE Trans. on Circuits and Systems, 59-II(12):873-877, 2012. [doi]

No reviews for this publication, yet.