Kotaro Terada, Masao Yanagisawa, Nozomu Togawa. A Bitwidth-Aware High-Level Synthesis Algorithm Using Operation Chainings for Tiled-DR Architectures. IEICE Transactions, 100-A(12):2911-2924, 2017. [doi]
@article{TeradaYT17,
title = {A Bitwidth-Aware High-Level Synthesis Algorithm Using Operation Chainings for Tiled-DR Architectures},
author = {Kotaro Terada and Masao Yanagisawa and Nozomu Togawa},
year = {2017},
url = {http://search.ieice.org/bin/summary.php?id=e100-a_12_2911},
researchr = {https://researchr.org/publication/TeradaYT17},
cites = {0},
citedby = {0},
journal = {IEICE Transactions},
volume = {100-A},
number = {12},
pages = {2911-2924},
}