A Bitwidth-Aware High-Level Synthesis Algorithm Using Operation Chainings for Tiled-DR Architectures

Kotaro Terada, Masao Yanagisawa, Nozomu Togawa. A Bitwidth-Aware High-Level Synthesis Algorithm Using Operation Chainings for Tiled-DR Architectures. IEICE Transactions, 100-A(12):2911-2924, 2017. [doi]

Abstract

Abstract is missing.