Benchmarking Large Language Models for Automated Verilog RTL Code Generation

Shailja Thakur, Baleegh Ahmad, Zhenxing Fan, Hammond Pearce, Benjamin Tan 0001, Ramesh Karri, Brendan Dolan-Gavitt, Siddharth Garg. Benchmarking Large Language Models for Automated Verilog RTL Code Generation. In Design, Automation & Test in Europe Conference & Exhibition, DATE 2023, Antwerp, Belgium, April 17-19, 2023. pages 1-6, IEEE, 2023. [doi]

@inproceedings{ThakurAFPTKDG23,
  title = {Benchmarking Large Language Models for Automated Verilog RTL Code Generation},
  author = {Shailja Thakur and Baleegh Ahmad and Zhenxing Fan and Hammond Pearce and Benjamin Tan 0001 and Ramesh Karri and Brendan Dolan-Gavitt and Siddharth Garg},
  year = {2023},
  doi = {10.23919/DATE56975.2023.10137086},
  url = {https://doi.org/10.23919/DATE56975.2023.10137086},
  researchr = {https://researchr.org/publication/ThakurAFPTKDG23},
  cites = {0},
  citedby = {0},
  pages = {1-6},
  booktitle = {Design, Automation & Test in Europe Conference & Exhibition, DATE 2023, Antwerp, Belgium, April 17-19, 2023},
  publisher = {IEEE},
  isbn = {978-3-9819263-7-8},
}