Shailja Thakur, Baleegh Ahmad, Hammond Pearce, Benjamin Tan 0001, Brendan Dolan-Gavitt, Ramesh Karri, Siddharth Garg. VeriGen: A Large Language Model for Verilog Code Generation. ACM Trans. Design Autom. Electr. Syst., 29(3), May 2024. [doi]
Abstract is missing.