Combined Integer and Variable Precision (CIVP) Floating Point Multiplication Architecture for FPGAs - researchr publication

researchr

You are not signed in
Sign in
Sign up

Himanshu Thapliyal, Hamid R. Arabnia, Rajnish Bajpai, Kamal K. Sharma. Combined Integer and Variable Precision (CIVP) Floating Point Multiplication Architecture for FPGAs. In Hamid R. Arabnia, editor, Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, PDPTA 2007, Las Vegas, Nevada, USA, June 25-28, 2007, Volume 1. pages 449-452, CSREA Press, 2007.

Abstract is missing.

runs on WebDSL