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SASA: A Scalable and Automatic Stencil Acceleration Framework for Optimized Hybrid Spatial and Temporal Parallelism on HBM-based FPGAs

Xingyu Tian, Zhifan Ye, Alec Lu, Licheng Guo, Yuze Chi, Zhenman Fang. SASA: A Scalable and Automatic Stencil Acceleration Framework for Optimized Hybrid Spatial and Temporal Parallelism on HBM-based FPGAs. TRETS, 16(2), June 2023. [doi]

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Xingyu Tian

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Zhifan Ye

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Alec Lu

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Licheng Guo

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Yuze Chi

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Zhenman Fang

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