Yu-Sheng Ting, Yu-Fan Teng, Tzi-Dar Chiueh. Batch Normalization Processor Design for Convolution Neural Network Training and Inference. In IEEE International Symposium on Circuits and Systems, ISCAS 2021, Daegu, South Korea, May 22-28, 2021. pages 1-4, IEEE, 2021. [doi]
@inproceedings{TingTC21, title = {Batch Normalization Processor Design for Convolution Neural Network Training and Inference}, author = {Yu-Sheng Ting and Yu-Fan Teng and Tzi-Dar Chiueh}, year = {2021}, doi = {10.1109/ISCAS51556.2021.9401434}, url = {https://doi.org/10.1109/ISCAS51556.2021.9401434}, researchr = {https://researchr.org/publication/TingTC21}, cites = {0}, citedby = {0}, pages = {1-4}, booktitle = {IEEE International Symposium on Circuits and Systems, ISCAS 2021, Daegu, South Korea, May 22-28, 2021}, publisher = {IEEE}, isbn = {978-1-7281-9201-7}, }