Power-aware FPGA logic synthesis using binary decision diagrams

Kevin Oo Tinmaung, David Howland, Russell Tessier. Power-aware FPGA logic synthesis using binary decision diagrams. In André DeHon, Mike Hutton, editors, Proceedings of the ACM/SIGDA 15th International Symposium on Field Programmable Gate Arrays, FPGA 2007, Monterey, California, USA, February 18-20, 2007. pages 148-155, ACM, 2007. [doi]

@inproceedings{TinmaungHT07,
  title = {Power-aware FPGA logic synthesis using binary decision diagrams},
  author = {Kevin Oo Tinmaung and David Howland and Russell Tessier},
  year = {2007},
  doi = {10.1145/1216919.1216945},
  url = {http://doi.acm.org/10.1145/1216919.1216945},
  tags = {context-aware, logic},
  researchr = {https://researchr.org/publication/TinmaungHT07},
  cites = {0},
  citedby = {0},
  pages = {148-155},
  booktitle = {Proceedings of the ACM/SIGDA 15th International Symposium on Field Programmable Gate Arrays, FPGA 2007, Monterey, California, USA, February 18-20, 2007},
  editor = {André DeHon and Mike Hutton},
  publisher = {ACM},
  isbn = {978-1-59593-600-4},
}