A Novel Design Methodology of the On-Chip Power Distribution Network Enhancing the Performance and Suppressing EMI of the SoC - researchr publication authors

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Hirokazu Tohya, Noritaka Toya. A Novel Design Methodology of the On-Chip Power Distribution Network Enhancing the Performance and Suppressing EMI of the SoC. In International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA. pages 889-892, IEEE, 2007. [doi]

This author has not been identified. Look up 'Hirokazu Tohya' in GoogleThis author has not been identified. Look up 'Noritaka Toya' in Google

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