Efficient 4-input LUTs FPGA implementation of combinatorial multiplier over canonical base GF(16)

Valeri F. Tomashau. Efficient 4-input LUTs FPGA implementation of combinatorial multiplier over canonical base GF(16). In Proceedings of the 2002 IEEE International Conference on Field-Programmable Technology, FPT 2002, Hong Kong, China, December 16-18, 2002. pages 318-321, IEEE, 2002. [doi]

Abstract

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