Sissades Tongsima, Chantana Chantrapornchai, Edwin Hsing-Mean Sha, Nelson L. Passos. Reducing Data Hazards on Multi-pipelined DSP Architecture with Loop Scheduling. VLSI Signal Processing, 18(2):111-123, 1998. [doi]
@article{TongsimaCSP98,
title = {Reducing Data Hazards on Multi-pipelined DSP Architecture with Loop Scheduling},
author = {Sissades Tongsima and Chantana Chantrapornchai and Edwin Hsing-Mean Sha and Nelson L. Passos},
year = {1998},
doi = {10.1023/A:1008063207990},
url = {http://dx.doi.org/10.1023/A:1008063207990},
tags = {architecture, data-flow},
researchr = {https://researchr.org/publication/TongsimaCSP98},
cites = {0},
citedby = {0},
journal = {VLSI Signal Processing},
volume = {18},
number = {2},
pages = {111-123},
}