Evaluation of Latch-Based PUFs Implemented on 40 nm ASICs

Naoya Torii, Dai Yamamoto, Tsutomu Matsumoto. Evaluation of Latch-Based PUFs Implemented on 40 nm ASICs. In Fourth International Symposium on Computing and Networking, CANDAR 2016, Hiroshima, Japan, November 22-25, 2016. pages 642-648, IEEE, 2016. [doi]

Authors

Naoya Torii

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Dai Yamamoto

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Tsutomu Matsumoto

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