Silicon Evaluation of Logic Proximity Bridge Patterns - researchr publication

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Eric N. Tran, Vishwashanth Kasulasrinivas, Sreejit Chakravarty. Silicon Evaluation of Logic Proximity Bridge Patterns. In 24th IEEE VLSI Test Symposium (VTS 2006), 30 April - 4 May 2006, Berkeley, California, USA. pages 78-85, IEEE Computer Society, 2006. [doi]

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