Lien-Bach Tran, Van-Tien Tran, Thi-Uyen Ha. A 0.392ms FPGA-Based Channel Estimation Design Implementing Fine Symbol Timing Offset and Residual Carrier Frequency Offset Cancellation for 2×4 MIMO Uplink in 5G Microcells. In IEEE/SICE International Symposium on System Integration, SII 2024, Ha Long, Vietnam, January 8-11, 2024. pages 1158-1163, IEEE, 2024. [doi]
@inproceedings{TranTH24,
title = {A 0.392ms FPGA-Based Channel Estimation Design Implementing Fine Symbol Timing Offset and Residual Carrier Frequency Offset Cancellation for 2×4 MIMO Uplink in 5G Microcells},
author = {Lien-Bach Tran and Van-Tien Tran and Thi-Uyen Ha},
year = {2024},
doi = {10.1109/SII58957.2024.10417699},
url = {https://doi.org/10.1109/SII58957.2024.10417699},
researchr = {https://researchr.org/publication/TranTH24},
cites = {0},
citedby = {0},
pages = {1158-1163},
booktitle = {IEEE/SICE International Symposium on System Integration, SII 2024, Ha Long, Vietnam, January 8-11, 2024},
publisher = {IEEE},
isbn = {979-8-3503-1207-2},
}