A multi-level simulation approach in a Simulink-based design tool for FPGAs

Maurizio Tranchero, Leonardo Maria Reyneri. A multi-level simulation approach in a Simulink-based design tool for FPGAs. In Annual IEEE International SoC Conference, SoCC 2009, September 9-11, 2009, Belfast, Northern Ireland, UK, Proceedings. pages 19-22, IEEE, 2009. [doi]

Authors

Maurizio Tranchero

This author has not been identified. Look up 'Maurizio Tranchero' in Google

Leonardo Maria Reyneri

This author has not been identified. Look up 'Leonardo Maria Reyneri' in Google