A 0.5V 560kHz 18.8fJ/Cycle Ultra-Low Energy Oscillator in 65nm CMOS with 96.1ppm/°C Stability using a Duty-Cycled Digital Frequency-Locked Loop

Daniel S. Truesdell, Shuo Li 0008, Benton H. Calhoun. A 0.5V 560kHz 18.8fJ/Cycle Ultra-Low Energy Oscillator in 65nm CMOS with 96.1ppm/°C Stability using a Duty-Cycled Digital Frequency-Locked Loop. In IEEE Symposium on VLSI Circuits, VLSI Circuits 2020, Honolulu, HI, USA, June 16-19, 2020. pages 1-2, IEEE, 2020. [doi]

@inproceedings{Truesdell0C20,
  title = {A 0.5V 560kHz 18.8fJ/Cycle Ultra-Low Energy Oscillator in 65nm CMOS with 96.1ppm/°C Stability using a Duty-Cycled Digital Frequency-Locked Loop},
  author = {Daniel S. Truesdell and Shuo Li 0008 and Benton H. Calhoun},
  year = {2020},
  doi = {10.1109/VLSICircuits18222.2020.9162832},
  url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162832},
  researchr = {https://researchr.org/publication/Truesdell0C20},
  cites = {0},
  citedby = {0},
  pages = {1-2},
  booktitle = {IEEE Symposium on VLSI Circuits, VLSI Circuits 2020, Honolulu, HI, USA, June 16-19, 2020},
  publisher = {IEEE},
  isbn = {978-1-7281-9942-9},
}