Power-saving nano-scale DRAMs with an adaptive refreshing clock generator - researchr publication authors

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Tung-Han Tsai, Chin-Lin Chen, Ching-Li Lee, Chua-Chin Wang. Power-saving nano-scale DRAMs with an adaptive refreshing clock generator. In International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA. pages 612-615, IEEE, 2008. [doi]

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