Tung-Han Tsai, Chin-Lin Chen, Ching-Li Lee, Chua-Chin Wang. Power-saving nano-scale DRAMs with an adaptive refreshing clock generator. In International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA. pages 612-615, IEEE, 2008. [doi]
@inproceedings{TsaiCLW08,
title = {Power-saving nano-scale DRAMs with an adaptive refreshing clock generator},
author = {Tung-Han Tsai and Chin-Lin Chen and Ching-Li Lee and Chua-Chin Wang},
year = {2008},
doi = {10.1109/ISCAS.2008.4541492},
url = {http://dx.doi.org/10.1109/ISCAS.2008.4541492},
researchr = {https://researchr.org/publication/TsaiCLW08},
cites = {0},
citedby = {0},
pages = {612-615},
booktitle = {International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA},
publisher = {IEEE},
}