Jen-Huan Tsai, Hui-Huan Wang, Yang-Chi Yen, Chang-Ming Lai, Yen-Ju Chen, Po-Chiun Huang, Ping-Hsuan Hsieh, Hsin Chen, Chao-Cheng Lee. 2 10 b 240 MS/s 0.7 mW SAR ADC in 28 nm CMOS With Digital Error Correction and Correlated-Reversed Switching. J. Solid-State Circuits, 50(6):1382-1398, 2015. [doi]
@article{TsaiWYLCHHCL15,
title = {2 10 b 240 MS/s 0.7 mW SAR ADC in 28 nm CMOS With Digital Error Correction and Correlated-Reversed Switching},
author = {Jen-Huan Tsai and Hui-Huan Wang and Yang-Chi Yen and Chang-Ming Lai and Yen-Ju Chen and Po-Chiun Huang and Ping-Hsuan Hsieh and Hsin Chen and Chao-Cheng Lee},
year = {2015},
doi = {10.1109/JSSC.2015.2413850},
url = {http://dx.doi.org/10.1109/JSSC.2015.2413850},
researchr = {https://researchr.org/publication/TsaiWYLCHHCL15},
cites = {0},
citedby = {0},
journal = {J. Solid-State Circuits},
volume = {50},
number = {6},
pages = {1382-1398},
}