An On-Chip PVT Compensation Technique with Current Monitoring Circuit for Low-Voltage CMOS Digital LSIs

Yusuke Tsugita, Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya. An On-Chip PVT Compensation Technique with Current Monitoring Circuit for Low-Voltage CMOS Digital LSIs. IEICE Transactions, 93-C(6):835-841, 2010. [doi]

Abstract

Abstract is missing.