Scalable Cache Miss Handling for High Memory-Level Parallelism

James Tuck, Luis Ceze, Josep Torrellas. Scalable Cache Miss Handling for High Memory-Level Parallelism. In 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-39 2006), 9-13 December 2006, Orlando, Florida, USA. pages 409-422, IEEE Computer Society, 2006. [doi]

@inproceedings{TuckCT06,
  title = {Scalable Cache Miss Handling for High Memory-Level Parallelism},
  author = {James Tuck and Luis Ceze and Josep Torrellas},
  year = {2006},
  doi = {10.1109/MICRO.2006.44},
  url = {http://doi.ieeecomputersociety.org/10.1109/MICRO.2006.44},
  tags = {caching},
  researchr = {https://researchr.org/publication/TuckCT06},
  cites = {0},
  citedby = {0},
  pages = {409-422},
  booktitle = {39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-39 2006), 9-13 December 2006,  Orlando, Florida, USA},
  publisher = {IEEE Computer Society},
}