Chao-Wen Tzeng, Shi-Yu Huang, Pei-Ying Chao. Parameterized All-Digital PLL Architecture and its Compiler to Support Easy Process Migration. IEEE Trans. VLSI Syst., 22(3):621-630, 2014. [doi]
@article{TzengHC14,
title = {Parameterized All-Digital PLL Architecture and its Compiler to Support Easy Process Migration},
author = {Chao-Wen Tzeng and Shi-Yu Huang and Pei-Ying Chao},
year = {2014},
doi = {10.1109/TVLSI.2013.2248070},
url = {http://dx.doi.org/10.1109/TVLSI.2013.2248070},
researchr = {https://researchr.org/publication/TzengHC14},
cites = {0},
citedby = {0},
journal = {IEEE Trans. VLSI Syst.},
volume = {22},
number = {3},
pages = {621-630},
}