Performance Analysis in Digital Circuits for Process Corner Variations, Slew-Rate and Load Capacitance

R. Udaiyakumar, Senoj Joseph, T. V. P. Sundararajan, D. Vigneswaran, R. Maheswar, Iraj S. Amiri. Performance Analysis in Digital Circuits for Process Corner Variations, Slew-Rate and Load Capacitance. Wireless Personal Communications, 103(1):99-115, 2018. [doi]

Authors

R. Udaiyakumar

This author has not been identified. Look up 'R. Udaiyakumar' in Google

Senoj Joseph

This author has not been identified. Look up 'Senoj Joseph' in Google

T. V. P. Sundararajan

This author has not been identified. Look up 'T. V. P. Sundararajan' in Google

D. Vigneswaran

This author has not been identified. Look up 'D. Vigneswaran' in Google

R. Maheswar

This author has not been identified. Look up 'R. Maheswar' in Google

Iraj S. Amiri

This author has not been identified. Look up 'Iraj S. Amiri' in Google