Performance Analysis in Digital Circuits for Process Corner Variations, Slew-Rate and Load Capacitance

R. Udaiyakumar, Senoj Joseph, T. V. P. Sundararajan, D. Vigneswaran, R. Maheswar, Iraj S. Amiri. Performance Analysis in Digital Circuits for Process Corner Variations, Slew-Rate and Load Capacitance. Wireless Personal Communications, 103(1):99-115, 2018. [doi]

@article{UdaiyakumarJSVM18a,
  title = {Performance Analysis in Digital Circuits for Process Corner Variations, Slew-Rate and Load Capacitance},
  author = {R. Udaiyakumar and Senoj Joseph and T. V. P. Sundararajan and D. Vigneswaran and R. Maheswar and Iraj S. Amiri},
  year = {2018},
  doi = {10.1007/s11277-018-5428-8},
  url = {https://doi.org/10.1007/s11277-018-5428-8},
  researchr = {https://researchr.org/publication/UdaiyakumarJSVM18a},
  cites = {0},
  citedby = {0},
  journal = {Wireless Personal Communications},
  volume = {103},
  number = {1},
  pages = {99-115},
}